panStamp board schematics

Schematics are quite simple: the atmega connected to the CC1101 interface via SPI, RF balum, filter, de-coupling capacitors and some few more passives. This simplicity allows 2-layer designs and this is the case for the current prototypes.

Figure 1: Microcontroller and external pins

Figure 2: RF circuitry

However, next versions will be 4-layer surely. Working on 4 layers will let us create an intermediate continuous ground plane, closer to the top component layer. That should give us a better RF performance. As for the PCB thickness, the thinner is the board the smaller is the distance between ground plane and signal tracks so the lower is the line impedance of those tracks. This is specially important when designing RF tracks with given impedances.

Back to the above design, what could we improve for the next prototypes?

Well, there seems to be a problem on the current design that affects the firmware upload. The Arduino bootloader may be enabling the CC1101 interface during the bootstrap process, perhaps generating some undesirable SPI traffic. All this may be causing the bootload communication problems. Anyway, there are still a lot of tests to be done but I think that I'll add, at least, some in-line and pull-up/down resistors to the SPI lines in order to firmly settle those lines during the firmware upload. On the other hand, I may take a look at the Arduino bootloader too I guess.